Dr. Chandrajit Pal
Senior Research Officer
Contact
Education
Ph.D. (Tech)
University of Calcutta, India
2012 - 2018
M.Tech., IT
University of Calcutta, India
Gold Medalist (Univ. Topper)
2008 - 2010
B.Tech., IT
West Bengal Univ. of Tech, India
2004 - 2008
Awards & Honors
- 2024: Best Paper Award, IEEE COINS, Kings College London, UK.
- 2018: AMD Best Project award (IIT Hyderabad, India)
- 2017: IEEE ISCAS 2017 conference studentship award (Baltimore, MD, USA).
- 2017: National Post-Doctoral Fellow at IIT Hyderabad (DST, SERB, Govt of India)
- 2016: Newton Bhabha Fellow, University of Southampton, UK
- 2012: VDAT fellowship award
- 2011: DST Inspire Fellow Presidential Award (SERB, DST, Govt of India)
- 2010: Gold Medal recipient (masters), University of Calcutta.
Core Skills
AI & Machine Learning | VHDL, Verilog (RTL) | TensorFlow, PyTorch, Keras, Python | VIVADO, MATLAB | ARM Development Studio
Research Interests
Computer Vision & Signal Processing Algorithms | Custom Computing using FPGAs | Embedded & IoT Systems | HW/SW Co-design | Artificial Intelligence | Scheduling Algorithms | Hardware Security at the Edge
Media Recognition
Research on neural network deployment for portable devices featured in global news outlets.
Advisory Board
Honorary Advisory Board Member
3DACCEL Software Technologies
π About 3DACCEL
Invited Talks
- UK Events: Sustainability and IoT security, Univ. of Glasgow (Nov 2026) | Univ. of Surrey, DICE Roadshow (Nov 2025) | Workshop for Trustworthy ML, Univ. of Essex (Mar 2024) | Resilient Hardware talk, Stratford, London (Feb 2024) | Embedded hardware security, Old Trafford, Manchester (Nov 2023).
- Govt & Defense: Presentations for the Indian Navy, New Delhi (Jul 2018) and DRDO RCI, Hyderabad (Jul 2018).
- AI/ML Faculty Training: Led AICTE-sponsored programs on IoT and Data Analytics at JNTUA (Jul/Aug & Oct/Nov 2020), and ML induction at CET Jalgaon (2020).
- Guest Lectures & Training: Speaker and FPGA trainer at Jadavpur Univ. (2015), Univ. of Calcutta (Jul 2018), and JNTU Hyderabad (Jun 2019).
Professional Services
- Program Committee Member: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2026.
Peer Reviewer for Journals
- IEEE Transactions on Circuits and Systems for Video Technology.
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems (TCAD)
- The Journal of Supercomputing (Springer Nature).
- International Journal of Reconfigurable Computing, Wiley.
- Design Automation for Embedded Systems, Discover Internet of Things, (Springer Nature).
- IEEE Access
- CODES+ISSS (Embedded System Week).
- Signal, Image and Video Processing (Springer Nature)
- International Journal of Electronics (Taylor and Francis)
- SN Computer Science, Scientific Reports (Springer Nature).
- Defense Science Journal (DRDO, Govt of India)
External Collaborators
- Prof. Wim Vanderbauwhede, Prof. Jose Cano and team β School of Computing Science, University of Glasgow, UK.
- Prof. Nobuko Yoshida, Prof. Caitlin McElroy and team β Department of Computer Science, University of Oxford, UK.
- Dr. Kamalika Dutta, Lennart Weingarten and team β Institute of Computer Science, University of Bremen, Germany.
- Prof. Amit Acharyya, Dr. Pabitra Das β Electrical Engineering Dept, IIT Hyderabad, India.
- Prof. Xiaoqing Wen β Department of Computer Science and Networks, Kyushu Institute of Technology, Japan.
- Dr. Dwaipayan Biswas β Program Director, IMEC Belgium.
- Dr. Pradip Sasmal β IIT Jodhpur, India.
- Prof. Amlan Chakrabarti β University of Calcutta, India.
- Dr. Shaik M. Rafi β Renesas Electronics.
- Dr. Ramesh Reddy Chandrapu β Centaurus Technologies And Systems Pvt Ltd.
Professional Profile
Accomplished Senior Research Officer and AI Engineer with extensive experience across top-tier academic institutions and the semiconductor industry. Specialist in hardware-software co-design, resource-constrained AI optimisation, and building resilient and sustainable computing platforms.
Work Experience
Senior Research Officer
University of Essex, UK
August 2023 - Present
- IDEAL Project: An EPSRC (UKRI) funded project researching hardware-software co-design methods to extend the active lifespan of IoT devices, in collaboration with the University of Glasgow and the University of Oxford. π Project Webpage
- Morello-HAT Project: An EPSRC (UKRI) funded project leveraging CHERI-based hardware capabilities to improve memory security and type safety, in collaboration with the University of Glasgow and the University of Oxford. π Project Webpage
Senior Research Associate & National Post-Doctoral Fellow
IIT Hyderabad, India
May 2022 - August 2023 | August 2017 - August 2019
- Defense & Avionics (DRDO - R&D wing of Ministry of Defence, Govt of India): Developed Digital Scene Matching Area Correlation (DSMAC) algorithms and prototype systems, and designed reconfigurable machine learning accelerators for avionics.
- Biomedical AI: Designed adaptive approximate computing systems for biomedical devices using machine learning.
- Hardware Optimization: Improved power optimization and enhanced the performance of System-on-Chips (SoC), focusing on processors and customized hardware logic (Suzuki MotoCorp).
Senior Engineer II & AI Research Engineer
Ceremorphic Technologies (erstwhile Redpine Signals Inc), a fabless semiconductor company headquartered in San Jose, California, USA.
August 2019 - April 2022
- Computer Vision & GPUs: Built neural networks and optimised algorithms for 4K video person detection and re-identification. This included using MLPerf models to optimise various network operations, preparing them for porting into custom neural engines and TSMC 5nm chips.
- Edge AI & HW Optimization: Created a novel compression method for running CNNs on low-power devices and optimized NLP/vision models for custom neural engines.
- Novel AI Architectures: Designed Transformer-based Graph Neural Networks (GNN) for e-commerce (recommender systems) and developed a fall-detection system using standard Wi-Fi signals.
- Industry Leadership: Taught AI/ML courses for university faculty development programs as an invited industry expert.
Patents, Research Grants, and Publications
- Patents:
- Systems and methods for a lightweight pattern-aware generative adversarial network.
Country: US Patent | Status: Granted | Patent No: 12423957 | Applicant: Ceremorphic Technologies Pvt Ltd.
- Network based side channel attack (SCA) detection.
Country: US Patent | Status: Granted | Patent No: 12613960 | Applicant: Ceremorphic Technologies Pvt Ltd.
- A system and method for analyzing videos of application or function for feature identification of the videos and related application or function.
Country: Indian Patent | Status: Granted | Patent No: 472279 | Applicant: University of Calcutta
- Edge Device for Executing a Lightweight Pattern-Aware generative Adversarial Network.
Country: US Patent | Status: Filed & Published | App No: 17/519,589 | Applicant: Ceremorphic Technologies Pvt Ltd.
- Computing device.
Country: Japanese Patent | Status: Filed | App No: 2024-139125 | Applicant: IIT Hyderabad & Suzuki Motor Corporation
- A method for 360Β° video stitching using single-shot homography for object detection and real-time tracking.
Country: Indian Patent | Status: Filed & Published | App No: 202541053699 | Applicant: IIT Hyderabad
- Method and system of selective binarization of deep neural networks.
Country: Indian Patent | Status: Filed & Published | App No: 202541027676 | Applicant: IIT Hyderabad
- Grants:
- Principal Investigator for a 1.9M INR grant for biomedical and embedded system design. hosted by IIT Hyderabad, India. Funding body: SERB, Govt of India (Grant No. SERB/F/8478/2020-2021).
- Functional connectivity analysis from electroencephalogram recording. Hosted by University of Southampton, UK. Funding body: British Council UK and SERB, DST Govt of India, (Β£ 9,826), (Grant No. DST/INSPIRE/NBHF/2015/11).
- Publications: Published extensively in high-impact IEEE Transactions like TSUSC, TCE, TETCI, TAI, IoT, Elsevier BSPC, CMPB and Springer Nature journals.
π Google Scholar Profile |
π Scopus ID: 37049428600 |
π ORCID: 0000-0002-0576-8014
Selected Publications
Journals
- Shaik MR, Das P, Chellu D, Mohanraj K, Pal C, Gyaneshwar D, Acharyya A. SATNet: Low Complexity Encoder-Only Edge Transformer Design using Second-Order Approximation for Road Classification. IEEE Transactions on Consumer Electronics (IF=10.9). 2026 Feb 17. [Link]
- Chandrapu RR, Das P, Pal C, Prokash V, Sudhamsu RS, Chakraborty S, Das B, Acharyya A. QRVS: Quick and Robust Video Stitcher with Novel Single Shot Homography for Simultaneous Object Detection and Tracking. IEEE Transactions on Artificial Intelligence (IF=4.78). 2025 Oct 16. [Link]
- Verma P, Pal C, Sasmal P, Najiya KZ, Acharyya A. EdgeNet: Empowering Edge Device Performance by Leveraging Clustered Networks for Optimal Memory Management With Platform-Awareness. IEEE Transactions on Emerging Topics in Computational Intelligence (IF=6.5). 2025 Jun 25. [Link]
- Pal C, Saha S, Zhai X, Howells G, McDonald-Maier KD. APPARENT: AI-Powered Platform Anomaly Detection in Edge Computing. IEEE Transactions on Sustainable Computing (IF=3.9). 2025 Apr 21. [Link]
- Pal C, Saha S, Zhai X, McDonald-Maier K. RENOWNED: a real-time anomaly detection and mitigation framework in edge-enabled IoV. IEEE Internet of Things Journal (IF=9.6). 2025 Feb 25. [Link]
- Pal C, Pankaj S, Akram W, Biswas D, Mattela G, Acharyya A. Fragmented Huffman-Based Compression Methodology for CNN Targeting Resource-Constrained Edge Devices. Circuits, Systems, and Signal Processing (IF=2.3). 2022 Jul;41(7):3957-84. [Link]
- Sivasubramani S, Mattela V, Pal C, Islam MS, Acharyya A. Shape and positional anisotropy based area efficient magnetic quantum-dot cellular automata design methodology for full adder implementation. IEEE Transactions on Nanotechnology (IF=2.5). 2018 Oct 11;17(6):1303-7. [Link]
Conferences
- Pal C, Saha S, Zhai X, McDonald-Maier KD. "REALITY: RL-PowEred AnomaLy Detection with Imprecise Computing in MulTi-Core SYstems," 2024 IEEE International Conference on Omni-layer Intelligent Systems (COINS), London, UK, 2024, pp. 1-6. [Link]
- Pal, C., Verma, P., Rohit, H., Gyaneshwar, D., Channappayya, S. S., & Acharyya, A. "SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edge," 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), Edinburgh, UK, 2023, pp. 1-5. [Link]
- Borowski M, Pal C, Saha S, Poli L, Zhai X, McDonald-Maier KD. "Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-design," 2023 21st IEEE Interregional NEWCAS Conference (NEWCAS), Edinburgh, UK, 2023, pp. 1-5. [Link]
- Vinay R, Laad K, Pal C, Sasmal P, Haraki T, Tamura K, Juyal C, Elbakri MAG, Acharyya A. "Power and Memory Efficient High-Speed RL Based Run time Power Manager for Edge Computation," 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS), Tempe, AZ, USA, 2023, pp. 546-550. [Link]
- Vinay R, Sasmal P, Pal C, Haraki T, Tamura K, Juyal C, Elbakri MA, Channappayya S, Acharyya A. Light weight rl based run time power management methodology for edge devices. In 2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Glasgow, UK, 2022 Oct 24 (pp. 1-4). IEEE. [Link]
- Pal C, Pankaj S, Akram W, Acharyya A, Biswas D. Modified Huffman based compression methodology for deep neural network implementation on resource constrained mobile platforms. In 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, Italy, 2018 May 27 (pp. 1-5). IEEE. [Link]
- Pal C, Biswas D, Maharatna K, Chakrabarti A. Architecture for complex network measures of brain connectivity. In 2017 IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, 2017 May 28 (pp. 1-4). IEEE. [Link]
Book Chapters
- Pal C, Acharyya A. (2022). A Novel Architecture Design for Complex Network Measures of Brain Connectivity Aiding Diagnosis. In: Gargiulo GD, Naik GR (eds) Wearable/Personal Monitoring Devices Present to Future. Springer, Singapore. [Link]
- Pal C, Vemishetty N, Acharyya A. Pervasive Computing in Cardiovascular Healthcare (CRC Press, 2019). ISBN 9780429113390.
- Acharya M, Pal C, Maity S, Chakrabarti A. βInexact implementation of wavelet transform and its performance evaluation through bit width reduction,β In Chakrabarti A, Sharma N, Balas VE (eds.) Advances in Computing Applications, pp. 227β242. Springer, Singapore (2016). [Link]
Module Development & Teaching
- Industry Training: Designed AI/ML basic, intermediate and advanced modules and provided training in faculty development programs as an industry expert to colleges like College of Engineering and Technology, Jalgaon, JNTUA College of Engineering (Autonomous) Ananthapuramu etc, Hyderabad, India.
- Course Design: Neural network accelerator design course (IIT Hyderabad, India).
- Subjects Taught (Sikkim Manipal Institute of Technology, Sikkim, India as an Assistant Professor (2010 to 2012)): Embedded system (EC-602) along with lab (EC-609) | Microelectronics and VLSI DESIGN (EC-703) and lab (EC-707).
Academic Supervision & Grant Writing
- Supervised 4 master's degree final-year major projects (IIT Hyderabad, India).
- Supervised 6 final-year undergraduate engineering projects and 2 PhD students (SMIT and IIT Hyderabad, India).
- Presently mentoring 2 PhD students, 2 masterβs students, and 1 undergrad in the Computer Science and Electronic Engineering department, University of Essex, UK.
- Experienced in writing multiple research grants to assist my professors (supervisors) at IIT Hyderabad, India (focusing on defense projects, MeitY, SERB, DST, DBT) and the University of Essex, UK (focusing on IoT security and biomedical research, EPSRC(UKRI), Innovate UK, DICE circular economy).